Supercomputers are wonderful machines which allow scientist and engineers to perform high speed application processing and simulation in the fields of biology, astronomy, engineering and physics. It is considered as the third pillar of science.
Case Study of Supercomputing in Pakistan
The supercomputer is composed of multiple processors, memory and I/O system while an interconnect mechanism has significantly complex architecture than the ordinary computers.
The recent advances in the fields of artificial intelligence, machine learning and data analytics have led to a growing demand for compute resources such as increased processing power, faster memory and large storage. Conventionally, supercomputers have been used to meet these compute demands by allowing significant amount of data to be processed very quickly. Therefore, supercomputing is considered as a backbone in all fields of academia, research and industry today.
What is the problem?
In short, Affordability and the Ability to program a heterogeneous parallel platform.
Affordability: Conventionally, a supercomputer is a gigantic machine that requires a large portion of the building to house it and special arrangements to keep it cool. This centralized deployment increases the overall running and maintenance cost, typically to millions of dollars. Thus, affordability is a concern, especially in the context of Pakistan where many small to medium tech companies and University’s research groups cannot afford to own a supercomputer machine for their needs.
Ability to program: Running a conventional sequential program on parallel hardware requires a programmer to “think parallel”. This parallel programming becomes further difficult when the target hardware is heterogeneous in nature. Therefore, expressing sequential program for heterogeneous parallel platform becomes a daunting task for a conventional programmer.
How do we address the problem?
In this work, we propose to develop a decentralized Scalable Supercomputer. At the heart of our scalable solution is a low-cost compute node, which we call as “super-cluster”. This super-cluster uses heterogeneous processing cores including Central Processing Unit (CPU), Graphical Processing Unit (GPU) and Field Programmable Gate Arrays (FPGA).These super-cluster nodes can be combined together to form a mini-supercomputer and several of these mini-computers can be further combined to form a supercomputer. Thus, offering a high-performance computing platform which scales with the processing needs and financial budget.
An implication to this scalable solution is the art of programming such parallel heterogeneous computing platform, without exposing the underlying hardware complexities to the end-user. As such, we also propose “elastic parallel programming models” that execute applications tasks on the proposed supercomputing platform via a user-friendly web-based GUI.
The proposed project “Development Of A Scalable Heterogeneous Supercomputer” supports CUDA, MPI/LAM, OpenMP, OpenCL and OpenACC as the programming models and allows to solve larger algorithms & numerical techniques, big data & data mining, bioinformatics & genomics, business intelligence & analytics, climate, and weather & ocean related problems.
UCERD Pvt Ltd is one of the largest high performance computing research center in Pakistan.
The mission of UCERD is to generate knowledge and technology to provide the infrastructure and supercomputing services to scientists and engineer.
The “Supercomputing System for Artifical Intellgence” proposed and designed by Principal Investigator Dr. Tassadaq Hussain, who is a full-time permanent faculty member in the Department of Electrical Engineering at Riphah International University, Islamabad and with the collaboration of UCERD (Pvt) Ltd.
Case Study of Supercomputing in Pakistan
The supercomputer is composed of multiple processors, memory and I/O system while an interconnect mechanism has significantly complex architecture than the ordinary computers.
The recent advances in the fields of artificial intelligence, machine learning and data analytics have led to a growing demand for compute resources such as increased processing power, faster memory and large storage. Conventionally, supercomputers have been used to meet these compute demands by allowing significant amount of data to be processed very quickly. Therefore, supercomputing is considered as a backbone in all fields of academia, research and industry today.
What is the problem?
In short, Affordability and the Ability to program a heterogeneous parallel platform.
Affordability: Conventionally, a supercomputer is a gigantic machine that requires a large portion of the building to house it and special arrangements to keep it cool. This centralized deployment increases the overall running and maintenance cost, typically to millions of dollars. Thus, affordability is a concern, especially in the context of Pakistan where many small to medium tech companies and University’s research groups cannot afford to own a supercomputer machine for their needs.
Ability to program: Running a conventional sequential program on parallel hardware requires a programmer to “think parallel”. This parallel programming becomes further difficult when the target hardware is heterogeneous in nature. Therefore, expressing sequential program for heterogeneous parallel platform becomes a daunting task for a conventional programmer.
How do we address the problem?
In this work, we propose to develop a decentralized Scalable Supercomputer. At the heart of our scalable solution is a low-cost compute node, which we call as “super-cluster”. This super-cluster uses heterogeneous processing cores including Central Processing Unit (CPU), Graphical Processing Unit (GPU) and Field Programmable Gate Arrays (FPGA).These super-cluster nodes can be combined together to form a mini-supercomputer and several of these mini-computers can be further combined to form a supercomputer. Thus, offering a high-performance computing platform which scales with the processing needs and financial budget.
An implication to this scalable solution is the art of programming such parallel heterogeneous computing platform, without exposing the underlying hardware complexities to the end-user. As such, we also propose “elastic parallel programming models” that execute applications tasks on the proposed supercomputing platform via a user-friendly web-based GUI.
The proposed project “Development Of A Scalable Heterogeneous Supercomputer” supports CUDA, MPI/LAM, OpenMP, OpenCL and OpenACC as the programming models and allows to solve larger algorithms & numerical techniques, big data & data mining, bioinformatics & genomics, business intelligence & analytics, climate, and weather & ocean related problems.
UCERD Pvt Ltd is one of the largest high performance computing research center in Pakistan.
The mission of UCERD is to generate knowledge and technology to provide the infrastructure and supercomputing services to scientists and engineer.
The “Supercomputing System for Artifical Intellgence” proposed and designed by Principal Investigator Dr. Tassadaq Hussain, who is a full-time permanent faculty member in the Department of Electrical Engineering at Riphah International University, Islamabad and with the collaboration of UCERD (Pvt) Ltd.
We are hiring potential candidates for following vacancies.
Email Your CV and covering letter to:
Tassadaq@ucerd.com
Jobs@ucerd.com
ucerd.pvt.ltd@gmail.com
Email Your CV and covering letter to:
Tassadaq@ucerd.com
Jobs@ucerd.com
ucerd.pvt.ltd@gmail.com
[1] Authors: Wasim, Akram.; Tassadaq Hussain; Eduard Ayguade.
Title: FPGA and ARM Processor based Supercomputing
Conference: 2018 International Conference on Computing, Mathematics and Engineering Technologies – iCoMET 2018.
Publisher: IEEE Xplorer.
ISBN: 978-1-5386-1370-2.
[2] Memory Resources Aware Run-Time Automated Scheduling Policy for Multi-core Systems Authors Tassadaq Hussain Publication date 2017/12/16 Journal Microprocessors and Microsystems Publisher Elsevier
[3] Memory Resources Aware Run-Time Automated Scheduling Policy for Multi-core Systems, Tassadaq Hussain. ScienceDirect Microprocessors and Microsystems 2017. ISSN: 0141-9331 IF: 1.025
[4] ViPS: A Novel Visual Processing System Architecture for Medical Imaging: Tassadaq Hussain, ScienceDirect Biomedical Signal Processing and Control, ISSN: 1746-8094. IF: 2.214
[5] Formation of pn-junction with stable n-doping in graphene field effect transistors using e-beam irradiation. Muhammad Zahir Iqbal, Nadia Anwar, Salma Siddique, Muhammad Waqas Iqbal, Tassadaq Hussain. Journal of Optical Materials 2017, ISSN: 0925-3467 IF: 2.238
[6] A Novel Hardware Support for Heterogeneous Multi-core Memory System : Tassadaq Hussain, ScienceDirect Journal of Parallel and Distributed Computing 2016, ISSN: 0743-7315. IF: 1.930
[7] PMSS: A Programmable Memory System and Scheduler for Regular Memory Patterns: Tassadaq Hussain, Eduard Ayguade and Amna Haider. ScienceDirect Journal of Parallel and Distributed Computing 2014. ISSN: 0743-7315 IF:1.930
[8] AMC: Advanced Multi-core Controller: Tassadaq Hussain, Amna Haider, Shakaib Arsalan and Eduard Ayguade. ScienceDirect Journal of Parallel Computing 2014. ISSN: 0167-8191 IF: 1.511
[9] Memory Controller for Vector Processor: Tassadaq Hussain, Springer Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 2016. ISSN: 1939-8018 IF: 0.893
[10] HMMC: A Memory Controller for Heterogeneous Multi-core System, Tassadaq Hussain. ScienceDirect Microprocessors and Microsystems 2015. ISSN: 0141-9331 IF: 1.025
[11] PGC: a pattern-based graphics controller: Tassadaq Hussain and Amna Haider. Int. J. Circuits and Architecture Design 2014.
Title: FPGA and ARM Processor based Supercomputing
Conference: 2018 International Conference on Computing, Mathematics and Engineering Technologies – iCoMET 2018.
Publisher: IEEE Xplorer.
ISBN: 978-1-5386-1370-2.
[2] Memory Resources Aware Run-Time Automated Scheduling Policy for Multi-core Systems Authors Tassadaq Hussain Publication date 2017/12/16 Journal Microprocessors and Microsystems Publisher Elsevier
[3] Memory Resources Aware Run-Time Automated Scheduling Policy for Multi-core Systems, Tassadaq Hussain. ScienceDirect Microprocessors and Microsystems 2017. ISSN: 0141-9331 IF: 1.025
[4] ViPS: A Novel Visual Processing System Architecture for Medical Imaging: Tassadaq Hussain, ScienceDirect Biomedical Signal Processing and Control, ISSN: 1746-8094. IF: 2.214
[5] Formation of pn-junction with stable n-doping in graphene field effect transistors using e-beam irradiation. Muhammad Zahir Iqbal, Nadia Anwar, Salma Siddique, Muhammad Waqas Iqbal, Tassadaq Hussain. Journal of Optical Materials 2017, ISSN: 0925-3467 IF: 2.238
[6] A Novel Hardware Support for Heterogeneous Multi-core Memory System : Tassadaq Hussain, ScienceDirect Journal of Parallel and Distributed Computing 2016, ISSN: 0743-7315. IF: 1.930
[7] PMSS: A Programmable Memory System and Scheduler for Regular Memory Patterns: Tassadaq Hussain, Eduard Ayguade and Amna Haider. ScienceDirect Journal of Parallel and Distributed Computing 2014. ISSN: 0743-7315 IF:1.930
[8] AMC: Advanced Multi-core Controller: Tassadaq Hussain, Amna Haider, Shakaib Arsalan and Eduard Ayguade. ScienceDirect Journal of Parallel Computing 2014. ISSN: 0167-8191 IF: 1.511
[9] Memory Controller for Vector Processor: Tassadaq Hussain, Springer Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 2016. ISSN: 1939-8018 IF: 0.893
[10] HMMC: A Memory Controller for Heterogeneous Multi-core System, Tassadaq Hussain. ScienceDirect Microprocessors and Microsystems 2015. ISSN: 0141-9331 IF: 1.025
[11] PGC: a pattern-based graphics controller: Tassadaq Hussain and Amna Haider. Int. J. Circuits and Architecture Design 2014.
Team Leader :
Dr. Tassadaq Hussain
Members :
Tanzeel Ur Rehman did Masters in Computer Sciences from Federal Urdu University Islamabad. His areas of expertise include Network & System Administration, onsite technical support involving software and hardware & coordinating with Different IT vendors. Currently he is serving UCERD Pvt Ltd Islamabad as Network Architect & Infrastructure Specialist.
Affiliations :
[1] Barcelona Supercomputing Center Spain
[2] Riphah Int'l University Islamabad
Dr. Tassadaq Hussain
Members :
Tanzeel Ur Rehman did Masters in Computer Sciences from Federal Urdu University Islamabad. His areas of expertise include Network & System Administration, onsite technical support involving software and hardware & coordinating with Different IT vendors. Currently he is serving UCERD Pvt Ltd Islamabad as Network Architect & Infrastructure Specialist.
Affiliations :
[1] Barcelona Supercomputing Center Spain
[2] Riphah Int'l University Islamabad
Porject Title: Development Of A Scalable Heterogeneous Supercomputer
UCERD Rawalpindi
Supercomputing Center
UCERD Murree
Won HEC Technology Development Fund of Rs. 16 Million
PI: Dr. Tassadaq Hussain (Associate Prof)
Ph.D. Electrical Engineering (HPC)
Industrial Partner: Amna Haider
C.E.O UCERD Pvt Ltd
PI: Dr. Tassadaq Hussain (Associate Prof)
Ph.D. Electrical Engineering (HPC)
Industrial Partner: Amna Haider
C.E.O UCERD Pvt Ltd
UCERD Gathering Intellectuals Fostering Innovations
Unal Center of Educaiton Research & Development
Unal Center of Educaiton Research & Development
