The Super Computing Group (SCG) can work on research, industry and defence projects, including big data processing, signal processing, and low power computing. The SCG targest different high performance architectures for super computing.  A generic block diagram of target design is shown in the Figure.
























The proposed architecture uses FPGAs based accelerators, DSP, GPU and RISC multi-core system. A High level synthesis tool is used to program FPGA accelerators for specific applications. These dedicated accelerators have low footprint and low power consumption and provide high performance. SIMD architecture uses DSPs and the CUDA Tesla, Fermi, etc. architectures," the GPU Computing Modules. Low power ARM and high performance x86 multi-core processor systems are also used in the Super-Cluster system which allows system to execute most of the generic C/C++ applications. The proposed system is ideal for seismic processing, biochemistry simulations, weather and climate modeling, signal processing, computational finance, CAE, CFD and data analytics.


The main objectives of the SCG are:  
Provide a low-power low-cost super computing resources to work out of academic, research and defence project.
Generate a team of collaborations for faculty, post-graduate students, specialists, scientists and technical resources working on high performance computing projects and initiatives. 
Propose and Develop low-power low-cost embedded and heterogeneous system architectures for compute intensive applications.
The SCG targets three types of Super-Cluster architectures which are the Low Power Low-Cost Super-Cluster, the Transitional Performance Super-Cluster and the High-Performance Super-Cluster.  The SCG is categorized into the following subsections: Target Applications, Programming Models and Toolkits, Supported Operating System, and Performacne Cost and Power.
Software Defined Radio (SDR) is the technique of getting code as close to the antenna as possible. It turns radio hardware problems into software problems.  The SDR technology is used for radio communication which implements the components required for the radio system with software or programmable hardware. The SDR system is defined as a radio in which some or all of the physical layer functions are programmed in the software. The digital waveforms are generated and converted to analog form using a Digital to Analog Converter (DAC) at the transmitter and at the receiver, they are converted to digital form using Analog to Digital Converter (ADC) and demodulated using the software. The SDR applications are implemented on a programmable digital system having, Digital Signal Processing, RISC general purpose processors, Programmable System on Chip (PSoC), Application Specific Accelerators, Field Programmable Gate Arrays (FPGAs), or specialized co-processors.

The Software Defined Radio Group (SDRG) motive is to develop novel single board computer architectures/platforms for software defined radio applications. The SDRG architectures perform synchronous multi-channel data for mitigating interference, advancing digital communication theory, developing power-efficient communications, and locating emitters dynamically.
Some of the most significant features of SDRG hardware architectures are mentioned below:

Use communication system resources efficiently under varying conditions.

Take advantage of underutilized spectrum. If one application is not using its spectrum, the hardware can ‘borrow’ the spectrum until the application starts using it again.

Upgrade or reprogram to support the latest communications standards.

Adapted to use in a different environment and for multiple applications.

Help to perform future research and development by providing an implementation of many different waveforms for real-time performance analysis.

The SDR targets General-purpose design suitable for any software-defined radio application, MIMO radio, Point-to-point communication systems, Femtocell/picocell/microcell, base stations, Wi-Fi, ISM, etc.  applications.

The Software-Defined Radio (SDR) architecture (shown in Figure2) is subdivided into six systems, the Back-end System, the Radio Frequency System, the Analog and Digital System, the Reconfigureable System,  the High Performance Processing System and the Front-end System. The Back-end System deals with wide-band antenna which gives full coverage reception from 80MHz to 6GHz. The system uses interdependent antennas for shortwave and VHF. The Radio Frequency System serves as interface to the analog RF domain. The Analog and Digital System perform singal conversion and creates an interface between the digital and the analog world. The Reconfigurealbe System  is used to perform data conversion in to different digital formate. FPGAs are used because it provide bit level data parallelsim. The High Performance Processing System is used to perform software signnal processing. The Front-end System deals with the user controlled pheriphrals such as keypad, LCD, mic, camera, etc. It takes the data from user and forwared it to processing system for communicaiton.
Digital System Design Group (DSDG) provides hardware/software solution for embedded applicatoins. The group targets applications used in industrial and military applications where precise control is the core requirement. DSDG design digital processor control system as a whole, which is the smartest solution where size, reliability, efficiency is required. Due to its smartness it could be the best solution for now a days of robotics applications. DSDG projects qualify the industrial and military standards which includes temperature, vibration, robust, ruggedized, EMI/EMC compliant etc. The hardware solutions are based on sigle board computers having System on Chip (SoC) or Multiple System on a Chip architectures, which can communicate to other systems and systems within the system over analogue, digital and serial interfaces.
Some of DSDG onging projects are mentioned below:

High Performacne Single Board Computer (HPSBC):
HPSBC has on board PWM controller for linear actuators control. The single board computer based on Spartan 6 FPGA and DSP processor with on board 4GB DDR3 SDRAM, Flash Memory, High speed 24-bit, 4-channel ADC, MUX/DEMUX, DAC etc. The HPSBC is designed to withstand even the most rugged industrial applications.

Reconfigureable Multiple Processor System on Chip (RMPSoC):
RMPSoC uses FPGA based MPSoC architecture having SICS, RISC and Application Specific Accelerator architecture. The MPSoC is used where hardware need to be configure based on application demand.
Data Acquisition Group (DAG) works on analog signal coming from different sensor (e.g. Optical, Communication, Biomedical sensors, etc.). The DAG works on hardware solutions which measures electrical or physical phenomenon such as voltage, current, temperature, pressure or sound, etc. A DAG systems consist of sensors, measurement hardware, memories and a processing cores with programmable software. Compared to traditional measurement systems, Programmable processor based data acquisition systems exploit the processing power, productivity, display and connectivity capabilities of industry-standard computers providing a more powerful, flexible and cost-effective measurement solution.
Currently, DAG has designed an ADDAS board which gathers sensor’s data on analogue and digital interface (depending upon the type of sensor interface) and reports to the main computer on serial interface.

Imaging has become an essential tool in modern medicine science. Numerous powerful platforms to register, store, analyze and process medical imaging applications have appeared in recent years. However, these systems do not fulfil the desired requirement as per local needs. That includes an indigenous system that could be customized according to the local needs. Moreover, the cost of such systems is on higher side that contributes to the increase in expenses of each scan. This results in discouraging patients who could not afford these high costs and therefore compromise on their health. Also, in many medical imaging systems such as MRI, the temporal resolution has been reported to be a major concern which causes discomfort to patients with severe illness/pain as they have to be at the still condition for a longer period of time.

The Embedded Computer Vision Group (ECVG) for Medical Applications (ECVG) proposes different hardware/software architectures/techniques for medical imaging applications. The hardware/software registers, stores and processes complex and multi-dimensional medical imaging application in real-time. The ECVG provides a user-friendly programming environment and high-performance architecture to perform imaging data acquisition, registration, storage, analysis and performs segmentation, filtering, and recognition for complex real-time complex and multidimensional medical images or videos. The proposed systems will be highly reliable concerning cost, performance, and power. The ECVG uses advanced heterogeneous multi-core and GPU based systems to implement and test applications.
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